In a cruise control system based on a digital circuit for controlling the vehicle speed at a fixed level, it is necessary to monitor the current vehicle speed at each control cycle. Typically, the vehicle speed is computed by counting the number of pulses generated from a pulse generator provided adjacent to a rotating part of a wheel assembly over a certain time interval defined by the internal clock of a CPU for each control cycle executed in the CPU. An example of cruise control system is disclosed in U.S. patent application No. 129,257 filed Dec. 7, 1987. The contents of this application is herein incorporated by reference. One of the assignees of this application is common to the assignee of the present application.
In such a speed detecting system, the detected number of pulses may be either underrated or exaggerated due to the inadvertent omission of pulses and contamination of the pulses with noises. In either case, the operation of the cruise control system is based on erroneous speed data. Generation of erroneous data can be detected as an abrupt change in the computed speed. Since erroneous speed data leads to an erratic action of the cruise control system, some measure must be taken in order to prevent any undesirable consequence from the use of erroneous speed data.
It is possible to abort the operation of the cruise control system when any such error in the speed data is detected, but too frequent abortion of the cruise control system causes undue inconvenience to the user of the cruise control system. To eliminate this problem, Japanese patent laid open publication No. 59-210370 proposes to not use incoming data after an abrupt change in the current data is detected until the incoming data following the abrupt change has maintained the same level for more than a certain number of control cycles.
However, according to this proposal, since abnormal data is accepted when it has persisted long enough, the occurrence of the abnormal data, which may be, for instance, due to a failure in the pulse generator, tends to be disregarded, and it is possible for such a hardware failure to go unnoticed.